LPC800 (3) MDK-ARM に LPC81x を追加する: SYSLAB blog

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Stack Configuration ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; */ .equ Stack_Size, 0x00000200 .section ".stack", "w" .align 3 .globl __cs3_stack_mem .globl __cs3_stack_size __cs3_stack_mem: .if Stack_Size .space Stack_Size .endif .size __cs3_stack_mem, . - __cs3_stack_mem .set __cs3_stack_size, . - __cs3_stack_mem /* ; Heap Configuration ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; */ .equ Heap_Size, 0x00000000 .section ".heap", "w" .align 3 .globl __cs3_heap_start .globl __cs3_heap_end __cs3_heap_start: .if Heap_Size .space Heap_Size .endif __cs3_heap_end: /* ; Use Code Read Protection ; Code Read Protection <0xFFFFFFFF=>CRP Disabled ; <0x12345678=>CRP Level 1 ; <0x87654321=>CRP Level 2 ; <0x43218765=>CRP Level 3 (ARE YOU SURE?) ; <0x4E697370=>NO ISP (ARE YOU SURE?) ; */ .equ CRP_Enable, 1 .if CRP_Enable .section ".CRP._0x02FC","a",%progbits .globl CRP_Key .type CRP_Key, %object CRP_Key: .word 0xFFFFFFFF .size CRP_Key, . - CRP_Key .endif /* ; Reset Handler ; Reset Handler Type <0x1=>RAM MODE ; <0x0=>FlashROM(_start) ; <0x2=>FlashROM(main) ; */ .equ Reset_Handler_Type, 0x2 /* ; Vector Table Mapped to Address 0 at Reset */ .section ".cs3.interrupt_vector" .globl __cs3_interrupt_vector_cortex_m .type __cs3_interrupt_vector_cortex_m, %object __cs3_interrupt_vector_cortex_m: .long __cs3_stack @ 00: Top of Stack .long __cs3_reset @ 01: Reset Handler .long NMI_Handler @ 02: NMI Handler .long HardFault_Handler @ 03: Hard Fault Handler .long 0 @ 04: Reserved .long 0 @ 05: Reserved .long 0 @ 06: Reserved .long 0 @ 07: Vector Checksum Validation .long 0 @ 08: Reserved .long 0 @ 09: Reserved .long 0 @ 10: Reserved .long SVC_Handler @ 11: SVCall Handler .long 0 @ 12: Reserved .long 0 @ 13: Reserved .long PendSV_Handler @ 14: PendSV Handler .long SysTick_Handler @ 15: SysTick Handler @ External Interrupts .long SPI0_IRQHandler @ 16+ 0: SPI0 controller .long SPI1_IRQHandler @ 16+ 1: SPI1 controller .long 0 @ 16+ 2: Reserved .long UART0_IRQHandler @ 16+ 3: UART0 .long UART1_IRQHandler @ 16+ 4: UART1 .long UART2_IRQHandler @ 16+ 5: UART2 .long 0 @ 16+ 6: Reserved .long 0 @ 16+ 7: Reserved .long I2C_IRQHandler @ 16+ 8: I2C controller .long SCT_IRQHandler @ 16+ 9: Smart Counter Timer .long MRT_IRQHandler @ 16+10: Multi-Rate Timer .long CMP_IRQHandler @ 16+11: Comparator .long WDT_IRQHandler @ 16+12: PIO1 (0:11) .long BOD_IRQHandler @ 16+13: Brown Out Detect .long 0 @ 16+14: Reserved .long WKT_IRQHandler @ 16+15: Wakeup timer .long 0 @ 16+16: Reserved .long 0 @ 16+17: Reserved .long 0 @ 16+18: Reserved .long 0 @ 16+19: Reserved .long 0 @ 16+20: Reserved .long 0 @ 16+21: Reserved .long 0 @ 16+22: Reserved .long 0 @ 16+23: Reserved .long PININT0_IRQHandler @ 16+24: PIO INT0 .long PININT1_IRQHandler @ 16+25: PIO INT1 .long PININT2_IRQHandler @ 16+26: PIO INT2 .long PININT3_IRQHandler @ 16+27: PIO INT3 .long PININT4_IRQHandler @ 16+28: PIO INT4 .long PININT5_IRQHandler @ 16+29: PIO INT5 .long PININT6_IRQHandler @ 16+30: PIO INT6 .long PININT7_IRQHandler @ 16+31: PIO INT7 .size __cs3_interrupt_vector_cortex_m, . - __cs3_interrupt_vector_cortex_m .thumb /* ; Reset Handler */ .section .cs3.reset,"x",%progbits .thumb_func .globl __cs3_reset_cortex_m .type __cs3_reset_cortex_m, %function __cs3_reset_cortex_m: .fnstart .if (Reset_Handler_Type == 1) @ RAM_MODE /* Clear .bss section (Zero init) */ MOV R0, #0 LDR R1, =__bss_start__ LDR R2, =__bss_end__ LoopZI: CMP R1, R2 BHS BSSIsEmpty STR R0, [R1] ADD R1, #4 B LoopZI BSSIsEmpty: .ifndef __NO_SYSTEM_INIT LDR R0, =SystemInit BLX R0 .endif LDR R0,=main BX R0 .elseif (Reset_Handler_Type == 2) @ Do not use Standerd System Startup Files /* Relocate .data section (Copy from ROM to RAM) */ LDR R1, =_etext LDR R2, =__cs3_region_start_ram LDR R3, =_edata LoopRel: CMP R2, R3 BHS DataIsEmpty LDR R0, [R1] ADD R1, #4 STR R0, [R2] ADD R2, #4 B LoopRel DataIsEmpty: /* Clear .bss section (Zero init) */ MOV R0, #0 LDR R1, =__bss_start__ LDR R2, =__bss_end__ LoopZI: CMP R1, R2 BHS BSSIsEmpty STR R0, [R1] ADD R1, #4 B LoopZI BSSIsEmpty: .ifndef __NO_SYSTEM_INIT LDR R0, =SystemInit BLX R0 .endif LDR R0,=main BX R0 .else @ Use Standerd System Startup Files .ifndef __NO_SYSTEM_INIT LDR R0, =SystemInit BLX R0 .endif LDR R0,=_start BX R0 .endif .pool .cantunwind .fnend .size __cs3_reset_cortex_m,.-__cs3_reset_cortex_m .section ".text" @; Dummy Exception Handlers (infinite loops which can be modified) @; now, under COMMON lpc8xx_nmi.c and lpc8xx_nmi.h, a real NMI handler is created if NMI is enabled @; for particular peripheral. .weak NMI_Handler .type NMI_Handler, %function NMI_Handler: B . .size NMI_Handler, . - NMI_Handler .weak HardFault_Handler .type HardFault_Handler, %function HardFault_Handler: B . .size HardFault_Handler, . - HardFault_Handler .weak SVC_Handler .type SVC_Handler, %function SVC_Handler: B . .size SVC_Handler, . - SVC_Handler .weak PendSV_Handler .type PendSV_Handler, %function PendSV_Handler: B . .size PendSV_Handler, . - PendSV_Handler .weak SysTick_Handler .type SysTick_Handler, %function SysTick_Handler: B . .size SysTick_Handler, . - SysTick_Handler /* IRQ Handlers */ .globl Default_Handler .type Default_Handler, %function Default_Handler: B . .size Default_Handler, . - Default_Handler .macro def_irq_handler handler .weak \handler .set \handler, Default_Handler .endm @ def_irq_handler NMI_Handler def_irq_handler SPI0_IRQHandler def_irq_handler SPI1_IRQHandler def_irq_handler UART0_IRQHandler def_irq_handler UART1_IRQHandler def_irq_handler UART2_IRQHandler def_irq_handler I2C_IRQHandler def_irq_handler SCT_IRQHandler def_irq_handler MRT_IRQHandler def_irq_handler CMP_IRQHandler def_irq_handler WDT_IRQHandler def_irq_handler BOD_IRQHandler def_irq_handler WKT_IRQHandler def_irq_handler PININT0_IRQHandler def_irq_handler PININT1_IRQHandler def_irq_handler PININT2_IRQHandler def_irq_handler PININT3_IRQHandler def_irq_handler PININT4_IRQHandler def_irq_handler PININT5_IRQHandler def_irq_handler PININT6_IRQHandler def_irq_handler PININT7_IRQHandler .end